Notes: Liang Yalun

W13D2 notes Liang Yalun

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+Ideas in Android architecture
+
+- Java VM: Dalvik / ART
+- Init system: zygote
+  Linux startup process: pid 0 (kernel space) starts init (user space) process, and init starts other userspace processes.
+  zygote is the init process for Java processes; all IPC are controlled by zygote, and all Java processes are directly started by zygote (no startup by other processes).
+- Binder: IPC
+  Uses a kernel module to perform IPC
+- Parcel: serializer/deserializer
+- Android Interface Design Language / AIDL
+  Provides transparent RPC
+- Wake locks

W5D2 notes Liang Yalun

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+setjmp/longjmp 机制: 在 (可能多层嵌套的) 函数调用下返回一个之前的栈帧.
+用途之一是非结构化的异常处理.
+
+如何高效管理文件?
+文件: 连续字节流
+要求: 可以存储大文件; 可持久; 可并发访问.
+如果用文件名索引, 不同路径下可能有相同名称的文件.
+一个场景: 一个被打开的文件 1) 可不可以改名, 2) 改名了之后再对已经打开的 fd 做写入, 写入的是改名前还是后的文件?
+不同系统的处理方式不一样. NT 上打开的时候会给文件上锁, 所以打开的时候不能改名不能删除; Unix 上可以.
+
+识别文件的方式: 文件名和 magic.

W9D2 notes Liang Yalun

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+I/O
+
+Question 1. How to drive an I/O device?
+Question 2. How to perform read/write?
+
+Complexity:
+1. DMA, interrupts, etc.
+2. different types of devices
+
+A division:
+- block devices
+  - information is in fixed-sized blocks
+  - addressable, seekable
+  - random access
+- character devices
+  - information is in a stream of characters, no block structures
+  - not addressable nor seekable
+  - sequential access
+
+The USB could be treated as a network in a tree structure, with hubs as root
+and intermediate nodes, and devices as leaves.
+
+Direct Memory Access (DMA) controller: remembers address, count and control of
+a task; DMA requests device to transfer data directly to memory. When the
+transfer is completed the device acks to the DMA, then the DMA sends an
+interrupt to the CPU. This is called the on-fly mode of operation.
+
+Alternatively DMA could also read data from device, then write to memory; the
+write request and data are both sent by the DMA.
+
+Zero-copy: data should not be copied when processing.
+
+DMA controllers and interrupt controllers are limited resources; the CPU needs
+to manage their allocation.