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@Silimate

Silimate, Inc.

Silimate is the co-pilot for chip designers

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  1. prunefl prunefl Public

    SystemVerilog file list pruner

    C++ 16

  2. liberty2json liberty2json Public

    Liberty to JSON converter

    Verilog 3

  3. OpenSTA OpenSTA Public

    Forked from parallaxsw/OpenSTA

    OpenSTA Silimate fork

    C++ 2 6

  4. VlogHammer VlogHammer Public

    Forked from YosysHQ/VlogHammer

    A Verilog Synthesis Regression Test

    Shell 2 1

  5. silisizer silisizer Public

    Operator resize

    Verilog 1 3

  6. vcd2fst vcd2fst Public

    Convert VCD waveform file to FST waveform file

    C 1 1

Repositories

Showing 10 of 59 repositories
  • sv-tests-pvt-results Public Forked from Silimate/sv-tests-results

    Output of the sv-tests runs.

    Silimate/sv-tests-pvt-results’s past year of commit activity
    HTML 0 7 0 0 Updated Mar 7, 2026
  • yosys Public Forked from YosysHQ/yosys

    Yosys Open SYnthesis Suite

    Silimate/yosys’s past year of commit activity
    C++ 0 ISC 1,060 0 0 Updated Mar 7, 2026
  • iverilog Public Forked from steveicarus/iverilog

    Icarus Verilog

    Silimate/iverilog’s past year of commit activity
    C++ 0 GPL-2.0 598 0 0 Updated Mar 7, 2026
  • liberty2json Public

    Liberty to JSON converter

    Silimate/liberty2json’s past year of commit activity
    Verilog 3 GPL-3.0 0 0 0 Updated Mar 6, 2026
  • Nuitka Public Forked from Nuitka/Nuitka

    Nuitka is a Python compiler written in Python. It's fully compatible with Python 2.6, 2.7, 3.4-3.13. You feed it your Python app, it does a lot of clever things, and spits out an executable or extension module.

    Silimate/Nuitka’s past year of commit activity
    Python 0 AGPL-3.0 787 0 0 Updated Mar 6, 2026
  • silisizer Public

    Operator resize

    Silimate/silisizer’s past year of commit activity
    Verilog 1 GPL-3.0 3 0 0 Updated Mar 6, 2026
  • OpenSTA Public Forked from parallaxsw/OpenSTA

    OpenSTA Silimate fork

    Silimate/OpenSTA’s past year of commit activity
    C++ 2 GPL-3.0 56 0 1 Updated Mar 6, 2026
  • ibex Public Forked from lowRISC/ibex

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    Silimate/ibex’s past year of commit activity
    SystemVerilog 0 Apache-2.0 699 0 0 Updated Mar 4, 2026
  • prunefl Public

    SystemVerilog file list pruner

    Silimate/prunefl’s past year of commit activity
    C++ 16 MIT 0 0 0 Updated Mar 2, 2026
  • vcd2fst Public

    Convert VCD waveform file to FST waveform file

    Silimate/vcd2fst’s past year of commit activity
    C 1 1 0 0 Updated Mar 2, 2026
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